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authorJulien Viard de Galbert <jviarddegalbert@online.net>2018-08-14 16:15:26 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-09-14 14:11:03 +0000
commit2912e8e5dc66708703db79df87e3215408a653ae (patch)
treece3fd68f9114c4654957e4810f273625a148442f /src/mainboard/intel/glkrvp/boardid.c
parent86b8d176e8b2d62c1d4a713f91b5858b5d39dd84 (diff)
soc/intel/denverton_ns: Enable common block PMC
Mainly update headers to build. Added option PMC_GLOBAL_RESET_ENABLE_LOCK to remove function configuring the global reset through PMC base. On denverton the global reset lock is not in PMC base but in the PCI registers so this code cannot be shared. Change-Id: I9ace70862cab63f8355252d034292596c7eab1fd Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/25426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Evandro Luiz Hauenstein <kingsumos@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard/intel/glkrvp/boardid.c')
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