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authorHannah Williams <hannah.williams@intel.com>2017-05-05 16:39:21 -0700
committerAaron Durbin <adurbin@chromium.org>2017-07-26 20:31:24 +0000
commitd59f62bbdabeb98f12896c6af0ef50cbf25e013f (patch)
treeee22acd54dce71c326c019ee41f86c310f2b0df6 /src/mainboard/intel/glkrvp/board_info.txt
parent50ab84fa370ac247dfe57a65f9d9b1ed0384e7fa (diff)
mainboard/intel/glkrvp: Add support for GLKRVP
GLKRVP is a reference board for GLK SOC RVP1 has DDR4 and RVP2 has LPDDR4 RVP2 is enabled by default and CONFIG_IS_GLK_RVP_1 should be selected if building for RVP1 GLKRVP can work with internal Intel EC or external Chrome EC AIC. For internal EC, CONFIG_EC_GOOGLE_CHROMEEC will not be selected ( CONFIG_GLK_INTEL_EC should be selected for internal EC config) By default, CONFIG_GLK_CHROME_EC is selected for external ChromeEC AIC config. Signed-off-by: Hannah Williams <hannah.williams@intel.com> Change-Id: Iab688aca6a4f5c5e32801215ba3a1a440e50fbef Reviewed-on: https://review.coreboot.org/19604 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/glkrvp/board_info.txt')
-rw-r--r--src/mainboard/intel/glkrvp/board_info.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/glkrvp/board_info.txt b/src/mainboard/intel/glkrvp/board_info.txt
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index 0000000000..55b5714b78
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+++ b/src/mainboard/intel/glkrvp/board_info.txt
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+Vendor name: Intel
+Board name: Glkrvp GLK Reference Board
+Category: laptop
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y