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| author | Iru Cai <mytbk920423@gmail.com> | 2020-05-22 22:57:03 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:16:41 +0000 |
| commit | 12a13e1f30a62513d1ade0cef1d5f815b5ddad65 (patch) | |
| tree | 2f5c6d124a36e42e0608a132a0b7d35429543365 /src/mainboard/intel/galileo/gen1.h | |
| parent | 27126f135dad3c0e2f91394e7088b2ff50220146 (diff) | |
nb/intel/haswell: Add Crystal Well PCI IDs
From a log of a machine using Crystal Well CPU [1], Crystal Well CPUs
use some new PCI IDs. Without this patch, the Crystal Well northbridge
cannot be initialized in ramstage, thus the machine cannot boot. Some
PCI IDs of Crystal Well related devices can be found in the PCI ID
database [2].
Tested with i5-4570R (with LGA1150 mod) on ASRock H81M-HDS. The board
boots to SeaBIOS with boot screen displayed on HDMI output, and then
boots Arch Linux on a USB disk.
[1] https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/DNHLQTNTRQT43T67DG7L2HVI5CV74ZCM/
[2] https://pci-ids.ucw.cz/read/PC/8086
Change-Id: Icfe55323fd06187148c788ebfa7b679b6944e4f3
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41658
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/galileo/gen1.h')
0 files changed, 0 insertions, 0 deletions