diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-12-29 06:26:21 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-18 07:21:34 +0000 |
commit | 661ad4666ca0e78195f6901fce7b44a7e56e6331 (patch) | |
tree | 57c25cee551ec747dcfdf0e38f995a091d5fcd79 /src/mainboard/intel/emeraldlake2 | |
parent | 286a0572e75ade325238617d15c136f74c4f67a4 (diff) |
ACPI: Select ACPI_SOC_NVS only where suitable
Having some symmetry with <soc/nvs.h> now allows to reduce
the amount of gluelogic to determine the size and cbmc field
of struct global_nvs.
Since GNVS creation is now controlled by ACPI_SOC_NVS,
drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne
cannot have this selected until <soc/nvs.h> exists.
Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lance Zhao
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
-rw-r--r-- | src/mainboard/intel/emeraldlake2/acpi_tables.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/emeraldlake2/smihandler.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c index f0b11c6721..3e75d32dc4 100644 --- a/src/mainboard/intel/emeraldlake2/acpi_tables.c +++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> #include <device/device.h> -#include <southbridge/intel/bd82x6x/nvs.h> +#include <soc/nvs.h> #include "thermal.h" diff --git a/src/mainboard/intel/emeraldlake2/smihandler.c b/src/mainboard/intel/emeraldlake2/smihandler.c index 19712d9a3b..b1676d4fab 100644 --- a/src/mainboard/intel/emeraldlake2/smihandler.c +++ b/src/mainboard/intel/emeraldlake2/smihandler.c @@ -3,7 +3,7 @@ #include <acpi/acpi.h> #include <arch/io.h> #include <cpu/x86/smm.h> -#include <southbridge/intel/bd82x6x/nvs.h> +#include <soc/nvs.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/me.h> #include <northbridge/intel/sandybridge/sandybridge.h> |