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author | Keith Hui <buurin@gmail.com> | 2023-08-22 17:36:56 -0400 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-13 20:30:57 +0000 |
commit | 940fe080bf1ed2dac827b569c70fb0ea11496041 (patch) | |
tree | 8067f0072aded6f00a221cf2835b3396e21ec071 /src/mainboard/intel/emeraldlake2 | |
parent | 1e9601c5ef80a5b2eea52e512c7933e2daebd337 (diff) |
mb/apple/macbookair4_2: Correctly implement SPD mapping the Haswell way
While converting this board to provide SPD info using the Haswell API,
it was discovered that its SPD setup was not correct to begin with.
For a board that only has soldered down memory with SPD data in CBFS,
it didn't enable HAVE_SPD_IN_CBFS in Kconfig. It also duplicated one
set of SPD data with deliberate gaps in between. It worked its dark
magic within mainboard_get_spd(), which is going away as a callback.
Add HAVE_SPD_IN_CBFS to mainboard Kconfig, recreate the one set of SPD
data as a hex dump same as other boards, and hook everything back up
with Haswell-style mb_get_spd_map().
Recreated SPD data was extracted from abuild-built binary and manually
verified for correctness against existing spd.bin (which will be
removed in a follow-up).
Change-Id: I906c49f6d1949f830828530edc0298b1b22ec04d
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76995
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
0 files changed, 0 insertions, 0 deletions