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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-05 22:02:26 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-12 11:23:00 +0000 |
commit | 4bcc275d717c5c2ab926bc1ee2cb7122f58928e2 (patch) | |
tree | 72da4446470d3221ce728b6f4f8db48dbf2ed1b8 /src/mainboard/intel/emeraldlake2/onboard.h | |
parent | 4cdac3c7b3e03d85377f039cbd6cc677bf91acd9 (diff) |
mb/google,intel: Add ChromeOS GPIOs to onboard.h
Change-Id: Ia473596e3c9a75587cd1288c8816bfef66bef82e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2/onboard.h')
-rw-r--r-- | src/mainboard/intel/emeraldlake2/onboard.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/intel/emeraldlake2/onboard.h b/src/mainboard/intel/emeraldlake2/onboard.h new file mode 100644 index 0000000000..658ad83e19 --- /dev/null +++ b/src/mainboard/intel/emeraldlake2/onboard.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef EMERALDLAKE2_ONBOARD_H +#define EMERALDLAKE2_ONBOARD_H + +/* Recovery: GPIO22, active low */ +#define GPIO_REC_MODE 22 + +/* Write protect is active low */ +#define GPIO_SPI_WP 48 + +#endif |