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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-07-27 13:12:03 +0300 |
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committer | Anton Kochkov <anton.kochkov@gmail.com> | 2012-08-01 10:58:44 +0200 |
commit | 7f189cc74eb0358149f892c32a9bfa7b831c83a3 (patch) | |
tree | b54f67f797309300a23fa878ef5196416e21d39d /src/mainboard/intel/emeraldlake2/cmos.layout | |
parent | 1ec5e744c63938aa75e80e8d7548d05e998660a2 (diff) |
Intel Sandybridge and UMA: use mmio_resource()
With SandyBridge northbridge code, uma_memory_size was reset to
zero before variable MTRRs were set. This means MTRR setup routine
did not previously create a un-cacheable hole for uma.
Keep the behaviour that way, mmio_resource() has a prerequisuite that
the new region does not overlap with any cacheable ram_resource().
The result is not optimal setup in the number of used MTRRs, but
continue with this approach until MTRR algorithm is improved.
Change-Id: I63c8df19ad6b6350d46a3eca3055abf684b8b114
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1373
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2/cmos.layout')
0 files changed, 0 insertions, 0 deletions