diff options
| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-27 23:16:30 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-30 23:08:06 +0200 |
| commit | 6651da3bcd51ad6ea918c21564eb505b76c8c7aa (patch) | |
| tree | 7a10210115d4e600f7f6c16ddd6c61395acf8efb /src/mainboard/intel/emeraldlake2/Kconfig | |
| parent | c31384e62c98baf2fb847d55bb31a82f492ce265 (diff) | |
Add support for Intel Emerald Lake 2 CRB
This adds support for Intel's Emerald Lake 2 board.
Change-Id: Ifaeeac9d52fe655324ee29df5f7187b89b35f73a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/951
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2/Kconfig')
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/Kconfig | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig new file mode 100644 index 0000000000..9916aaa264 --- /dev/null +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -0,0 +1,58 @@ +if BOARD_INTEL_EMERALDLAKE2 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_X86 + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_IVYBRIDGE + select SOUTHBRIDGE_INTEL_C216 + select SUPERIO_SMSC_SIO1007 + select BOARD_ROMSIZE_KB_8192 + select BOARD_HAS_FADT + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select HAVE_MAINBOARD_RESOURCES + select MMCONF_SUPPORT + select HAVE_SMI_HANDLER + select GFXUMA + #select CHROMEOS + select EXTERNAL_MRC_BLOB + +config MAINBOARD_DIR + string + default intel/emeraldlake2 + +config MAINBOARD_PART_NUMBER + string + default "EMERALD LAKE 2" + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 8 + +config MAX_PHYSICAL_CPUS + int + default 8 + +config VGA_BIOS_FILE + string + default "pci8086,0166.rom" + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x1ae0 + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0xc000 + +endif # BOARD_INTEL_EMERALDLAKE2 |