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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2020-11-27 01:29:04 -0800
committerWerner Zeh <werner.zeh@siemens.com>2020-12-10 10:47:52 +0000
commit64d749d8630a290cd5f6903855d5f937d5948733 (patch)
treeafc1553b639821cc82680804964c981e22098862 /src/mainboard/intel/elkhartlake_crb
parentb5fed68ab9e8b8551977b3903cbdbeae6186ccb5 (diff)
mb/intel/ehlcrb: Remove ChromeOS EC support from smihandler
Since there is no ChromeOS support for EHL CRB, drop smihandler.c which just deals with ChromeOS support. Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com> Change-Id: Id474c3b04a82c03dda6514cc4565b58fb790b9c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48118 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/intel/elkhartlake_crb')
-rw-r--r--src/mainboard/intel/elkhartlake_crb/Makefile.inc1
-rw-r--r--src/mainboard/intel/elkhartlake_crb/smihandler.c37
2 files changed, 0 insertions, 38 deletions
diff --git a/src/mainboard/intel/elkhartlake_crb/Makefile.inc b/src/mainboard/intel/elkhartlake_crb/Makefile.inc
index cf9e1c902b..69a93685ba 100644
--- a/src/mainboard/intel/elkhartlake_crb/Makefile.inc
+++ b/src/mainboard/intel/elkhartlake_crb/Makefile.inc
@@ -10,7 +10,6 @@ romstage-y += board_id.c
ramstage-y += mainboard.c
ramstage-y += board_id.c
-smm-y += smihandler.c
subdirs-y += variants/baseboard
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
diff --git a/src/mainboard/intel/elkhartlake_crb/smihandler.c b/src/mainboard/intel/elkhartlake_crb/smihandler.c
deleted file mode 100644
index be0066a91b..0000000000
--- a/src/mainboard/intel/elkhartlake_crb/smihandler.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <baseboard/variants.h>
-#include <cpu/x86/smm.h>
-#include <ec/google/chromeec/ec.h>
-#include <ec/google/chromeec/smm.h>
-#include <elog.h>
-#include <intelblocks/smihandler.h>
-#include <baseboard/ec.h>
-
-void mainboard_smi_espi_handler(void)
-{
- if (CONFIG(EC_GOOGLE_CHROMEEC))
- chromeec_smi_process_events();
-}
-
-void mainboard_smi_sleep(u8 slp_typ)
-{
- if (CONFIG(EC_GOOGLE_CHROMEEC))
- chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
- MAINBOARD_EC_S5_WAKE_EVENTS);
-}
-
-int mainboard_smi_apmc(u8 apmc)
-{
- if (CONFIG(EC_GOOGLE_CHROMEEC))
- chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
-
- return 0;
-}
-
-void elog_gsmi_cb_mainboard_log_wake_source(void)
-{
- if (CONFIG(EC_GOOGLE_CHROMEEC))
- google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS |
- MAINBOARD_EC_S3_WAKE_EVENTS);
-}