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authorPatrick Georgi <patrick.georgi@secunet.com>2012-11-01 15:32:32 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-06 21:51:43 +0100
commitbf10bc3e44ae0d85a9db189c7c84e380a1ec8aa7 (patch)
treee0c79ac2fdcf9c560ef05c5896d97c76b9ec0093 /src/mainboard/intel/eagleheights
parent7d54eb8e23407e472380558d961d2df255600ae1 (diff)
intel/socket_BGA956: enable speedstep, CAR, MMX, SSE
All of these capabilities exist on all CPUs supported on this socket. Change-Id: I54f34e48e34bb6ab5b9954ab7ece8c2c3a1a8e67 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1664 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/eagleheights')
-rw-r--r--src/mainboard/intel/eagleheights/Kconfig8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/intel/eagleheights/Kconfig b/src/mainboard/intel/eagleheights/Kconfig
index 7722ad2b67..00ef377422 100644
--- a/src/mainboard/intel/eagleheights/Kconfig
+++ b/src/mainboard/intel/eagleheights/Kconfig
@@ -27,14 +27,6 @@ config MMCONF_BASE_ADDRESS
hex
default 0xe0000000
-config DCACHE_RAM_BASE
- hex
- default 0xffdf8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
-
config MAINBOARD_PART_NUMBER
string
default "EagleHeights"