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authorKevin Paul Herbert <kph@meraki.net>2014-12-24 18:43:20 -0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-15 08:50:22 +0100
commitbde6d309dfafe58732ec46314a2d4c08974b62d4 (patch)
tree17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/mainboard/intel/eagleheights
parent4b10dec1a66122b515b2191f823d7fd379ec655f (diff)
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/eagleheights')
-rw-r--r--src/mainboard/intel/eagleheights/mptable.c6
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c
index 809feec9de..b9c2fc3cf3 100644
--- a/src/mainboard/intel/eagleheights/mptable.c
+++ b/src/mainboard/intel/eagleheights/mptable.c
@@ -67,14 +67,14 @@ static void *smp_write_config_table(void *v)
uint32_t pin, route;
device_t dev;
struct resource *res;
- unsigned long rcba;
+ u8 *rcba;
dev = dev_find_slot(0, PCI_DEVFN(0x1F,0));
res = find_resource(dev, RCBA);
if (!res) {
return NULL;
}
- rcba = res->base;
+ rcba = res2mmio(res, 0, 0);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -121,7 +121,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0);
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 5700162112..a45ef7e566 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -83,7 +83,7 @@ static void early_config(void)
u32 gcs, rpc, fd;
/* Enable RCBA */
- pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, DEFAULT_RCBA | 1);
+ pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, (uintptr_t)DEFAULT_RCBA | 1);
/* Disable watchdog */
gcs = read32(DEFAULT_RCBA + RCBA_GCS);