diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2012-11-13 14:52:04 -0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-16 01:13:10 +0100 |
commit | fa2fc339c51649b106bf78703cbc17694abcee23 (patch) | |
tree | 2060aa4f53a88cb2dd269a83f3f02e16f45ca00a /src/mainboard/intel/eagleheights | |
parent | 55db955bcdad90c9ebd8b755ae417234d46d731a (diff) |
Drop Kconfig variable BOARD_HAS_HARD_RESET
hard_reset was indeed consolidated and moved into the southbridge
code a while ago, but the config variable was still kept alife, with
some duplicate code.
Change-Id: I60d4a87de916667f6e89353dfbe1a7b9eca380f7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1837
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/intel/eagleheights')
-rw-r--r-- | src/mainboard/intel/eagleheights/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/intel/eagleheights/reset.c | 36 | ||||
-rw-r--r-- | src/mainboard/intel/eagleheights/romstage.c | 2 |
3 files changed, 1 insertions, 38 deletions
diff --git a/src/mainboard/intel/eagleheights/Kconfig b/src/mainboard/intel/eagleheights/Kconfig index 4fd49fad10..0b765f920e 100644 --- a/src/mainboard/intel/eagleheights/Kconfig +++ b/src/mainboard/intel/eagleheights/Kconfig @@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SUPERIO_SMSC_SMSCSUPERIO select HAVE_OPTION_TABLE select HAVE_HARD_RESET - select BOARD_HAS_HARD_RESET select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select MMCONF_SUPPORT diff --git a/src/mainboard/intel/eagleheights/reset.c b/src/mainboard/intel/eagleheights/reset.c deleted file mode 100644 index 006c746dbb..0000000000 --- a/src/mainboard/intel/eagleheights/reset.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <reset.h> -#if defined (__PRE_RAM__) -#include <arch/romcc_io.h> -#endif - -void soft_reset(void) -{ - outb(0x04, 0xcf9); -} - -void hard_reset(void) -{ - outb(0x06, 0xcf9); -} diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index 1e906efdcb..95ad59f9d4 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -33,7 +33,7 @@ #include <cpu/intel/speedstep.h> #include "southbridge/intel/i3100/early_smbus.c" #include "southbridge/intel/i3100/early_lpc.c" -#include "reset.c" +#include "southbridge/intel/i3100/reset.c" #include "superio/intel/i3100/early_serial.c" #include "superio/smsc/smscsuperio/early_serial.c" #include "northbridge/intel/i3100/i3100.h" |