diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 11:49:22 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-05 14:22:39 +0000 |
commit | 803029685f96bccac13359fc616d1577508ba764 (patch) | |
tree | 6c67ba19094d2a9fe57001f0a19cc4a887bc6905 /src/mainboard/intel/dg41wv/devicetree.cb | |
parent | 98c92570d9bb363740ae1b2cbbefc3c0f2404cb4 (diff) |
nb/intel/x4x: Remove apic 0 from devicetree
This is added at runtime.
Change-Id: I7716f8a972e2280179aa6aee00488b22413c0c73
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69298
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/intel/dg41wv/devicetree.cb')
-rw-r--r-- | src/mainboard/intel/dg41wv/devicetree.cb | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/mainboard/intel/dg41wv/devicetree.cb b/src/mainboard/intel/dg41wv/devicetree.cb index 06617f6aae..49d6f8bd2d 100644 --- a/src/mainboard/intel/dg41wv/devicetree.cb +++ b/src/mainboard/intel/dg41wv/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit |