diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-06-01 14:50:07 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-05-26 08:25:50 +0000 |
| commit | fbc508fbb84ddbd047a8fde271c3877f032e48d1 (patch) | |
| tree | b36ccbc56e9d62a4ff28b076b0611c815ad0d95d /src/mainboard/intel/dg41wv/Kconfig | |
| parent | e3011451cccece7668f95e59dfb6f61c878b7e0a (diff) | |
mb/intel/dg41wv: Add mainboard
This board was used a test target for the x4x DDR3 raminit patches and
has an easy to access DIP8 socket.
What is tested and works:
* S3 resume
* PEG, PCI, USB, SATA
* Sound
* Ethernet
* Native graphic init (textmode and linear fb) on the VGA output
* Passing memtest86+ with 2 2Rx8 4G dimms
* PS2 Keyboard
* Flashing coreboot internally from vendor BIOS.
What does not work:
* Running dram at 533 MHz (limited at 400MHz currently)
Tested with two 4G dual rank DDR3 dimm, booted SeaBIOS and Linux
4.10.
Change-Id: If01bf658e52d273c3c203d362f21c3cb9c623f40
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20003
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/dg41wv/Kconfig')
| -rw-r--r-- | src/mainboard/intel/dg41wv/Kconfig | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/src/mainboard/intel/dg41wv/Kconfig b/src/mainboard/intel/dg41wv/Kconfig new file mode 100644 index 0000000000..02c75b47b0 --- /dev/null +++ b/src/mainboard/intel/dg41wv/Kconfig @@ -0,0 +1,50 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> +# Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz> +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +if BOARD_INTEL_DG41WV + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select ARCH_X86 + select CPU_INTEL_SOCKET_LGA775 + select NORTHBRIDGE_INTEL_X4X + select SOUTHBRIDGE_INTEL_I82801GX + select SUPERIO_WINBOND_W83627DHG + select HAVE_ACPI_TABLES + select BOARD_ROMSIZE_KB_2048 + select INTEL_EDID + select MAINBOARD_HAS_NATIVE_VGA_INIT + select PCIEXP_ASPM + select PCIEXP_CLK_PM + select PCIEXP_L1_SUB_STATE + select HAVE_OPTION_TABLE + select HAVE_CMOS_DEFAULT + select HAVE_ACPI_RESUME + select DRIVERS_I2C_CK505 + +config MAINBOARD_DIR + string + default "intel/dg41wv" + +config MAINBOARD_PART_NUMBER + string + default "DG41WV" + +config MAX_CPUS + int + default 4 + +endif # BOARD_INTEL_DG41WV |