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authorSubrata Banik <subrata.banik@intel.com>2019-04-29 14:58:20 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-05-02 06:03:21 +0000
commit42f9f14a61d7e71fabaf87125ecee992a5bd0dfa (patch)
treee2bce1cd9fea8c69cb3ec7b2d4df64ac46da17ad /src/mainboard/intel/dg41wv/Kconfig.name
parentffb83bee2627f1e33f8302a3e630e036e93891a9 (diff)
soc/intel/icelake: Correct the GPE DWx mapping for GPIO groups
This implementation corrects the GPE DWx mapping for GPIO groups. The assignments is done in GPIO MISCFG register for all GPIO communities. And configures the which GPIO communities get register as Tier1. Change-Id: I9c306d46e5194944def26c24cdb95f5ebada42b8 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/mainboard/intel/dg41wv/Kconfig.name')
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