diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-14 16:22:22 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-09-17 19:35:03 +0000 |
| commit | 92717ff3e475546366ac6439a4a0d4852bb2cb60 (patch) | |
| tree | 4141630e55b6499bf6709f3be56de170aa1082e6 /src/mainboard/intel/dcp847ske | |
| parent | 10240510a79901b0cf8ddfd8471ed412fb60bd36 (diff) | |
nb/intel/sandybridge: Drop invalid `DEFAULT_RCBABASE` macro
RCBA is located in the PCH. Replace all instances with the
already-defined `DEFAULT_RCBA` macro, which is equivalent.
Change-Id: I4b92737820b126d32da09b69e09675464aa22e31
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45348
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/dcp847ske')
| -rw-r--r-- | src/mainboard/intel/dcp847ske/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c index c9f3dcd42f..d793aca891 100644 --- a/src/mainboard/intel/dcp847ske/romstage.c +++ b/src/mainboard/intel/dcp847ske/romstage.c @@ -22,7 +22,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) .wdbbar = 0x4000000, .wdbsize = 0x1000, .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, + .rcba = (uintptr_t)DEFAULT_RCBA, .pmbase = DEFAULT_PMBASE, .gpiobase = DEFAULT_GPIOBASE, .thermalbase = 0xfed08000, |