diff options
author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:37:30 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:52 +0000 |
commit | 50863daef8ed75c0cb3dfd375e7622c898de5821 (patch) | |
tree | cbb2dea518524f8c9ce5edca5d57132ca9705086 /src/mainboard/intel/dcp847ske | |
parent | 0949e739066c3509e05db2b9ed71cefaaa62205f (diff) |
src/mainboard to src/security: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel/dcp847ske')
-rw-r--r-- | src/mainboard/intel/dcp847ske/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/dcp847ske/devicetree.cb b/src/mainboard/intel/dcp847ske/devicetree.cb index 389b44e1e1..f7821d0e98 100644 --- a/src/mainboard/intel/dcp847ske/devicetree.cb +++ b/src/mainboard/intel/dcp847ske/devicetree.cb @@ -81,7 +81,7 @@ chip northbridge/intel/sandybridge device pnp 4e.609 off end # GPIO6 device pnp 4e.709 off end # GPIO7 device pnp 4e.a on end # ACPI - device pnp 4e.b on # HWM, front pannel LED + device pnp 4e.b on # HWM, front panel LED io 0x60 = 0xa30 io 0x62 = 0 # unused end |