diff options
| author | Julius Werner <jwerner@chromium.org> | 2018-03-07 13:06:53 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-08 17:55:23 +0000 |
| commit | dc5d24c83702fb7367761eb31110548e51d8bb92 (patch) | |
| tree | d7561eada07d093181f62860585b69e2fedc9c75 /src/mainboard/intel/dcp847ske/smihandler.c | |
| parent | 85d98d9236c006e6ea328e8cde79b5bc15ee1264 (diff) | |
coreboot_table: Print GPIO state correctly for lb_gpios
Looks like there's a typo in the GPIO state table we print as part of
assembling the coreboot tables. Of course, high GPIOs are represented as
1 and low GPIOs as 0. Fix this display bug.
Change-Id: I59b4d49955c13f920576dd09f463e2d399ab64e0
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/25022
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/dcp847ske/smihandler.c')
0 files changed, 0 insertions, 0 deletions