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| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2022-06-23 23:00:04 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-06 01:43:44 +0000 |
| commit | 7bc711743db1b0003f2eeda0dfead5770283b2a2 (patch) | |
| tree | a64cdf96a1e468b820176cdb43890ce437665597 /src/mainboard/intel/dcp847ske/mainboard.c | |
| parent | e3178a16e0af1c89ab4816a0cd46421b20f7a470 (diff) | |
mb/google/nissa: Select Kconfig to perform CSE FW update in ramstage
Alder Lake-N based nissa boards use compressed ME_RW blobs for CSE FW
Update. Choose SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE Kconfig to perform
CSE FW sync in ramstage.
BRANCH=firmware-brya-14505.B
TEST=Perform CSE FW upgrade/downgrade on nivviks.
Change-Id: I00630096c52434f44914f3ae82ff043ecf77b80d
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65368
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/intel/dcp847ske/mainboard.c')
0 files changed, 0 insertions, 0 deletions