diff options
| author | Damien Zammit <damien@zamaudio.com> | 2016-01-26 13:55:43 +1100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-28 17:56:32 +0100 |
| commit | 761c2942ef1a26dde2b1c9a126c62f091daef789 (patch) | |
| tree | 405304eb5dfe177d8e220bc13cc5c75d91587591 /src/mainboard/intel/d510mo/devicetree.cb | |
| parent | 301999f4b86b2848d8027f889879db1c20cb270b (diff) | |
mb/intel/d510mo: Use native gfx initialization
Change-Id: Ic4de7a762e90b379be3814afc61467e1cd099215
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13034
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/intel/d510mo/devicetree.cb')
| -rw-r--r-- | src/mainboard/intel/d510mo/devicetree.cb | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb index c6f39a0f79..df5a0f9bda 100644 --- a/src/mainboard/intel/d510mo/devicetree.cb +++ b/src/mainboard/intel/d510mo/devicetree.cb @@ -15,14 +15,20 @@ # chip northbridge/intel/pineview # Northbridge + register "gfx.use_spread_spectrum_clock" = "0" + register "use_crt" = "1" + register "use_lvds" = "0" + device cpu_cluster 0 on # APIC cluster chip cpu/intel/socket_FCBGA559 # CPU device lapic 0 on end # APIC end end - device domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host Bridge - device pci 2.0 off end # Integrated graphics controller + device pci 1.0 off end # PEG + device pci 2.0 on end # Integrated graphics controller + device pci 2.1 on end # Integrated graphics controller 2 chip southbridge/intel/i82801gx # Southbridge register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b" |