mb/intel/coffelake_rvp: Implement mainboard memory information

Turn on SOC_INTEL_CANNONLAKE_MEMCFG_INT for coffeelake rvp platform
for easier collabration on newer platform. The setting in memory.c get
from board design itself.

BUG=N/A
TEST=Build and boot up with whiskey lake rvp platform.

Change-Id: I10f3af4bed511153cef4d6f3a93caea57cc4ae90
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/28257
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 4 insertions, 0 deletions

diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h
index cdae0f9738..64ff69fcd4 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h
@@ -16,6 +16,7 @@
 #ifndef __BASEBOARD_VARIANTS_H__
 #define __BASEBOARD_VARIANTS_H__
 
+#include <soc/cnl_memcfg_init.h>
 #include <soc/gpio.h>
 #include <stdint.h>
 #include <vendorcode/google/chromeos/chromeos.h>
@@ -28,6 +29,9 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
 
 const struct cros_gpio *variant_cros_gpios(size_t *num);
 
+/* Return memory configuration structure. */
+const struct cnl_mb_cfg *variant_memcfg_config(void);
+
 /* Seed the NHLT tables with the board specific information. */
 struct nhlt;
 void variant_nhlt_init(struct nhlt *nhlt);