diff options
author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-08-07 14:42:57 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-17 12:28:32 +0000 |
commit | b6f2e7bd4cdee7e91c3f380a25938f53f6d1c6fd (patch) | |
tree | 6213e56810b7004ff47a2b02db75b1b2964bf9e2 /src/mainboard/intel/coffeelake_rvp/spd | |
parent | bad8fbb22c9e0ebfbb3c291583527b8a30c3bde9 (diff) |
mb/intel/coffeelake_rvp: Update spd details as per Coffeelake board
Update SPD details to match with Coffeelake U RVP board
BUG=none
BRANCH=none
TEST=Boot on coffelake U rvp board and check if memory training is
passing and board boots till payload.
Change-Id: I953354cf5c6045731262f4f4e9da230187c2d246
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp/spd')
-rw-r--r-- | src/mainboard/intel/coffeelake_rvp/spd/spd_util.c | 28 |
1 files changed, 9 insertions, 19 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/spd/spd_util.c b/src/mainboard/intel/coffeelake_rvp/spd/spd_util.c index 09bd303aff..73f354d741 100644 --- a/src/mainboard/intel/coffeelake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/coffeelake_rvp/spd/spd_util.c @@ -23,8 +23,8 @@ void mainboard_fill_dq_map_ch0(void *dq_map_ptr) { /* DQ byte map Ch0 */ const u8 dq_map[12] = { - 0x0F, 0xF0, 0x0F, 0xF0, 0xFF, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0, + 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 }; memcpy(dq_map_ptr, dq_map, sizeof(dq_map)); } @@ -32,8 +32,8 @@ void mainboard_fill_dq_map_ch0(void *dq_map_ptr) void mainboard_fill_dq_map_ch1(void *dq_map_ptr) { const u8 dq_map[12] = { - 0x0F, 0xF0, 0x0F, 0xF0, 0xFF, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + 0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC, + 0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 }; memcpy(dq_map_ptr, dq_map, sizeof(dq_map)); } @@ -41,27 +41,17 @@ void mainboard_fill_dq_map_ch1(void *dq_map_ptr) void mainboard_fill_dqs_map_ch0(void *dqs_map_ptr) { /* DQS CPU<>DRAM map Ch0 */ - const u8 dqs_map_u[8] = { 0, 3, 2, 1, 5, 6, 7, 4 }; + const u8 dqs_map_h[8] = { 0, 1, 3, 2, 4, 5, 6, 7 }; - const u8 dqs_map_y[8] = { 2, 0, 3, 1, 6, 5, 7, 4 }; - - if (IS_ENABLED(CONFIG_BOARD_INTEL_COFFEELAKE_RVPU)) - memcpy(dqs_map_ptr, dqs_map_u, sizeof(dqs_map_u)); - else - memcpy(dqs_map_ptr, dqs_map_y, sizeof(dqs_map_y)); + memcpy(dqs_map_ptr, dqs_map_h, sizeof(dqs_map_h)); } void mainboard_fill_dqs_map_ch1(void *dqs_map_ptr) { /* DQS CPU<>DRAM map Ch1 */ - const u8 dqs_map_u[8] = { 3, 0, 1, 2, 5, 6, 4, 7 }; - - const u8 dqs_map_y[8] = { 3, 1, 2, 0, 4, 5, 6, 7 }; + const u8 dqs_map_h[8] = { 1, 0, 4, 5, 2, 3, 6, 7 }; - if (IS_ENABLED(CONFIG_BOARD_INTEL_COFFEELAKE_RVPU)) - memcpy(dqs_map_ptr, dqs_map_u, sizeof(dqs_map_u)); - else - memcpy(dqs_map_ptr, dqs_map_y, sizeof(dqs_map_y)); + memcpy(dqs_map_ptr, dqs_map_h, sizeof(dqs_map_h)); } void mainboard_fill_rcomp_res_data(void *rcomp_ptr) @@ -75,7 +65,7 @@ void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr) { /* Rcomp target */ static const u16 RcompTarget[RCOMP_TARGET_PARAMS] = { - 80, 40, 40, 40, 30 }; + 100, 33, 32, 33, 28 }; memcpy(rcomp_strength_ptr, RcompTarget, sizeof(RcompTarget)); } |