diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-07-24 17:46:20 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-09-21 15:14:24 +0000 |
| commit | e391cbff7ff5217c0bb17515a50c8bd88935eb31 (patch) | |
| tree | 0ca76ff63a27a31ffd87c1d0cc9e9a3b232048cb /src/mainboard/intel/coffeelake_rvp/romstage.c | |
| parent | 5b5656565ba4046f7d7fdc61d9fc79a1f67993be (diff) | |
mb/intel/coffeelake_rvp: Add whiskey lake rvp
Add new mainboard variant of whiskey lake rvp, which is primary
validation platform for whiskey lake silicon, support socket DDR4 memory
module.
BUG=N/A
TEST=Build and flash, confirm boot up into kernel on whiskey lake rvp
platform.
Change-Id: I4a5e8a9ec76d5e55e55ef9bf968825c17fbe9816
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/27628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp/romstage.c')
| -rw-r--r-- | src/mainboard/intel/coffeelake_rvp/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/romstage.c b/src/mainboard/intel/coffeelake_rvp/romstage.c index 1ea353725a..1ab2d78b5a 100644 --- a/src/mainboard/intel/coffeelake_rvp/romstage.c +++ b/src/mainboard/intel/coffeelake_rvp/romstage.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2016 Google Inc. - * Copyright (C) 2017-20188 Intel Corp. + * Copyright (C) 2017-2018 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by |