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authorpraveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>2018-09-28 22:31:49 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-10-17 12:09:35 +0000
commitda5491a626955480ae07f5cb944d8aff66a172d0 (patch)
tree2068b035133e7ff3174a4f8c3cbe80863463aa38 /src/mainboard/intel/coffeelake_rvp/Kconfig.name
parent92433c287862d2b4484de812ab4505c794ddcc5c (diff)
mb/intel/coffeelake_rvp: Add support for new coffee lake RVP8
- Add new mainboard variant coffee lake RVP8, which is CRB for coffee lake-s processor, support U-DIMM DDR4 memory module. - Modify cfl_h devicetree to enable IO devices, configure PCIE root port clock source, usb over current pin as per board schematics. - Select cannonlake PCH-H chipset config for both cfl_h & cfl_s. - Add GPIO table as per board schematics. BUG= None TEST= Build and flash, confirm boot into yocoto & windows OS on both cfl RVP11 & RVP8 platform. verified PCI, USB, ethernet, SATA, display, power functionalities. Change-Id: Iabd32eb43ee8e6b1a3993ba4e083a80c62485b14 Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> Reviewed-on: https://review.coreboot.org/29066 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp/Kconfig.name')
-rw-r--r--src/mainboard/intel/coffeelake_rvp/Kconfig.name2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig.name b/src/mainboard/intel/coffeelake_rvp/Kconfig.name
index f9f82a223a..773c83acc0 100644
--- a/src/mainboard/intel/coffeelake_rvp/Kconfig.name
+++ b/src/mainboard/intel/coffeelake_rvp/Kconfig.name
@@ -6,3 +6,5 @@ config BOARD_INTEL_COFFEELAKE_RVP11
bool "-> Coffeelake H SO-DIMM DDR4 RVP11"
config BOARD_INTEL_WHISKEYLAKE_RVP
bool "-> Whiskeylake U DDR4 RVP"
+config BOARD_INTEL_COFFEELAKE_RVP8
+ bool "-> Coffeelake S U-DIMM DDR4 RVP8"