diff options
author | Nico Huber <nico.huber@secunet.com> | 2021-10-14 18:16:39 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2021-11-09 11:05:33 +0000 |
commit | f4f365fdd0e63237a0328a468c4544c51835491c (patch) | |
tree | acf6bb1dcb3ea1e6fc2789e2e88d833fd92b19c7 /src/mainboard/intel/cedarisland_crb | |
parent | e01e25d4fc1d57fd84f5043f3b0b84c596bb5253 (diff) |
pci_mmio_cfg: Always use pci_s_* functions
When MMIO functions are available, the pci_s_* functions do exactly
the same thing. Drop the redundant pci_mmio_* versions.
Change-Id: I1043cbb9a1823ef94bcbb42169cb7edf282f560b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/intel/cedarisland_crb')
-rw-r--r-- | src/mainboard/intel/cedarisland_crb/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/cedarisland_crb/bootblock.c b/src/mainboard/intel/cedarisland_crb/bootblock.c index e51752b371..ae8212a8dd 100644 --- a/src/mainboard/intel/cedarisland_crb/bootblock.c +++ b/src/mainboard/intel/cedarisland_crb/bootblock.c @@ -21,7 +21,7 @@ void bootblock_mainboard_early_init(void) pcr_write32(PID_DMI, 0x2774, 1); /* Decode for SuperIO (0x2e) and COM1 (0x3f8) */ - pci_mmio_write_config32(PCH_DEV_LPC, 0x80, (1 << 28) | (1 << 16)); + pci_s_write_config32(PCH_DEV_LPC, 0x80, (1 << 28) | (1 << 16)); const pnp_devfn_t serial_dev = PNP_DEV(0x2e, AST2400_SUART1); aspeed_enable_serial(serial_dev, CONFIG_TTYS0_BASE); |