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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-25 17:05:35 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-11 16:37:28 +0000 |
| commit | aa969e887af6c76c0d5e694a3a17e14ee13d27b2 (patch) | |
| tree | 5f1c4ace30add956f2ccabed909a142fb351e856 /src/mainboard/intel/cedarisland_crb | |
| parent | f6f1215cdbbae04de8f84654d064b376395cf203 (diff) | |
ACPI: Move PICM declaration
Variable PICM was not inside GNVS region and can use a static
initialisation value.
For most AMD platforms PICM default changes from 1 to 0.
Fix comments about PICM==0 used to indicate use of i8259 PIC for
interrupt delivery.
Change-Id: I525ef8353514ec32941c4d0c37cab38aa320cb20
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49905
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/cedarisland_crb')
| -rw-r--r-- | src/mainboard/intel/cedarisland_crb/acpi/platform.asl | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/cedarisland_crb/acpi/platform.asl b/src/mainboard/intel/cedarisland_crb/acpi/platform.asl index 964959265f..6ac38dd937 100644 --- a/src/mainboard/intel/cedarisland_crb/acpi/platform.asl +++ b/src/mainboard/intel/cedarisland_crb/acpi/platform.asl @@ -19,8 +19,6 @@ Field (POST, ByteAcc, Lock, Preserve) Name(\APC1, Zero) // IIO IOAPIC -Name(\PICM, Zero) // IOAPIC/8259 - Method(_PIC, 1) { Store(Arg0, PICM) |