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| author | xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> | 2021-11-06 16:11:30 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-09 18:42:33 +0000 |
| commit | ba2b1139f1c3479bf7886bb3382216b1e76ad881 (patch) | |
| tree | 0680086c0bcce7f5c158fc45250e719b57435180 /src/mainboard/intel/cedarisland_crb | |
| parent | a003c33aa1ca31747314d721dee8a1a8552def4b (diff) | |
google/trogdor: Update the power on sequence of ps8640
For the Qualcomm PBL configuration of GPIO, we need to initial the
GPIOs for VDD33# and RST# at the beginning of coreboot. According to
the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#.
BUG=b:204637643
BRANCH=trogdor
TEST=verified the waveform of ps8640 at coreboot phase.
Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com>
Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58994
Reviewed-by: Wentao Qin <qinwentao@huaqin.corp-partner.google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/cedarisland_crb')
0 files changed, 0 insertions, 0 deletions