mainboard/intel/cannonlake_rvp: Add support for SND_MAX98357_DA7219

Add NHLT and dt support for Audio with Max98357 and DA7219

TEST=verified NHLT tables and SSDT entries
BUG=None

Change-Id: If7960eb6bb441f35cbd9a8a6acc37f03e04e3b70
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/22144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

4 files changed, 62 insertions, 3 deletions

diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/Makefile.inc
index 9fb63f5f43..0ad298b5f4 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/Makefile.inc
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/Makefile.inc
@@ -1,3 +1,4 @@
 bootblock-y += gpio.c
 
 ramstage-y += gpio.c
+ramstage-y += nhlt.c
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
index f50c5b7e85..44632e910d 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
@@ -48,8 +48,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPP_A18, UP_20K, DEEP, NF1),
 	/* A19 : ISH_GP_1 */
 	PAD_CFG_NF(GPP_A19, UP_20K, DEEP, NF1),
-	/* A20 : ISH_GP_2 */
-	PAD_CFG_NF(GPP_A20, UP_20K, DEEP, NF1),
+	/* A20 : aduio codec irq  */
+	PAD_CFG_GPI_APIC_LOW(GPP_A20, NONE, DEEP),
 	/* A21 : ISH_GP_3 */
 	PAD_CFG_NF(GPP_A21, UP_20K, DEEP, NF1),
 	/* A22 : ISH_GP_4 */
@@ -149,15 +149,19 @@ static const struct pad_config gpio_table[] = {
 	/* D16 : ISH_UART0_CTSB_SML0BALERTB */
 	PAD_CFG_GPI_SCI_HIGH(GPP_D16, NONE, DEEP, LEVEL),
 	/* D17 : DMIC_CLK_1_SNDW3_CLK */
+	PAD_CFG_NF(GPP_D17, UP_20K, DEEP, NF1),
 	/* D18 : DMIC_DATA_1_SNDW3_DATA */
+	PAD_CFG_NF(GPP_D18, UP_20K, DEEP, NF1),
 	/* D19 : DMIC_CLK_0_SNDW4_CLK */
+	PAD_CFG_NF(GPP_D19, UP_20K, DEEP, NF1),
 	/* D20 : DMIC_DATA_0_SNDW4_DATA */
+	PAD_CFG_NF(GPP_D20, UP_20K, DEEP, NF1),
 	/* D21 : SPI1_IO_2 */
 	PAD_CFG_NF(GPP_D21, NONE, PLTRST, NF1),
 	/* D22 : SPI1_IO_3 */
 	PAD_CFG_NF(GPP_D22, NONE, PLTRST, NF1),
 	/* D23 : SPP_MCLK */
-
+	PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
 	/* E0  : SATAXPCIE_0_SATAGP_0 */
 #if IS_ENABLED(CONFIG_BOARD_INTEL_CANNONLAKE_RVPY)
 	PAD_CFG_NF(GPP_E0, UP_20K, DEEP, NF1),
@@ -242,7 +246,9 @@ static const struct pad_config gpio_table[] = {
 	/* H4  : I2C2_SDA */
 	/* H5  : I2C2_SCL */
 	/* H6  : I2C3_SDA */
+	PAD_CFG_NF(GPP_H6, UP_2K, DEEP, NF1),
 	/* H7  : I2C3_SCL */
+	PAD_CFG_NF(GPP_H7, UP_2K, DEEP, NF1),
 	/* H8  : I2C4_SDA */
 	/* H9  : I2C4_SCL */
 	/* H10 : I2C5_SDA_ISH_I2C2_SDA */
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h
index 88d39332c5..056c57b813 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h
@@ -28,4 +28,8 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
 
 const struct cros_gpio *variant_cros_gpios(size_t *num);
 
+/* Seed the NHLT tables with the board specific information. */
+struct nhlt;
+void variant_nhlt_init(struct nhlt *nhlt);
+
 #endif /*__BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
new file mode 100644
index 0000000000..f8647d7011
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <nhlt.h>
+#include <soc/nhlt.h>
+
+void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt)
+{
+	/* 1-dmic configuration */
+	if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) &&
+		!nhlt_soc_add_dmic_array(nhlt, 1))
+		printk(BIOS_ERR, "Added 1CH DMIC array.\n");
+	/* 2-dmic configuration */
+	if (IS_ENABLED(CONFIG_NHLT_DMIC_2CH_16B) &&
+		!nhlt_soc_add_dmic_array(nhlt, 2))
+		printk(BIOS_ERR, "Added 2CH DMIC array.\n");
+	/* 4-dmic configuration */
+	if (IS_ENABLED(CONFIG_NHLT_DMIC_4CH_16B) &&
+		!nhlt_soc_add_dmic_array(nhlt, 4))
+		printk(BIOS_ERR, "Added 4CH DMIC array.\n");
+
+#if IS_ENABLED(CONFIG_INCLUDE_SND_MAX98357_DA7219_NHLT)
+	/* Dialog for Headset codec.
+	 * Headset codec is bi-directional but uses the same configuration
+	 * settings for render and capture endpoints.
+	 */
+	if (!nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP2))
+		printk(BIOS_ERR, "Added Dialog_7219 codec.\n");
+
+	/* MAXIM Smart Amps for left and right speakers. */
+	if (!nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP1))
+		printk(BIOS_ERR, "Added Maxim_98357 codec.\n");
+#endif
+}