mainboard/intel/cannonlake_rvp: Add support for SND_MAX98357_DA7219

Add NHLT and dt support for Audio with Max98357 and DA7219

TEST=verified NHLT tables and SSDT entries
BUG=None

Change-Id: If7960eb6bb441f35cbd9a8a6acc37f03e04e3b70
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/22144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 28 insertions, 0 deletions

diff --git a/src/mainboard/intel/cannonlake_rvp/mainboard.c b/src/mainboard/intel/cannonlake_rvp/mainboard.c
index 855d368d56..316485d6e6 100644
--- a/src/mainboard/intel/cannonlake_rvp/mainboard.c
+++ b/src/mainboard/intel/cannonlake_rvp/mainboard.c
@@ -13,9 +13,12 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/acpi.h>
 #include <baseboard/variants.h>
 #include <device/device.h>
+#include <nhlt.h>
 #include <soc/gpio.h>
+#include <soc/nhlt.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <variant/gpio.h>
 
@@ -28,8 +31,33 @@ static void mainboard_init(void *chip_info)
 	gpio_configure_pads(pads, num);
 }
 
+static unsigned long mainboard_write_acpi_tables(
+	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+	uintptr_t start_addr;
+	uintptr_t end_addr;
+	struct nhlt *nhlt;
+
+	start_addr = current;
+
+	nhlt = nhlt_init();
+
+	if (nhlt == NULL)
+		return start_addr;
+
+	variant_nhlt_init(nhlt);
+
+	end_addr = nhlt_soc_serialize(nhlt, start_addr);
+
+	if (end_addr != start_addr)
+		acpi_add_table(rsdp, (void *)start_addr);
+
+	return end_addr;
+}
+
 static void mainboard_enable(device_t dev)
 {
+	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
 	dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
 }