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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-03 15:23:17 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-06 05:02:44 +0000
commit3fd259c91d54fbfcd45e1cfe73ddfbf2359ddd78 (patch)
treeb4e23705eef481d37fc664a765eaa5053662513d /src/mainboard/intel/cannonlake_rvp/dsdt.asl
parentef40c0ce91a85124205105f337b52026c1f69d0d (diff)
postcar: Add cbmem_stage_cache
S3 resume path executing through postcar was unable to utilise cached ramstage in CBMEM. Change-Id: Icc8947c701ca32b4f261ebb78dfc1215b7ed2da0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21382 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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