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authorFurquan Shaikh <furquan@google.com>2020-05-02 10:24:23 -0700
committerFurquan Shaikh <furquan@google.com>2020-05-02 18:45:16 +0000
commit76cedd2c292352d7dbd45fab70ec272e476d0910 (patch)
tree21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/mainboard/intel/baskingridge
parente0844636aca974449c7257e846ec816db683d0b9 (diff)
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/mainboard/intel/baskingridge')
-rw-r--r--src/mainboard/intel/baskingridge/acpi_tables.c2
-rw-r--r--src/mainboard/intel/baskingridge/dsdt.asl2
-rw-r--r--src/mainboard/intel/baskingridge/mainboard.c2
-rw-r--r--src/mainboard/intel/baskingridge/mainboard_smi.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c
index 935acf17ed..b09c7146cf 100644
--- a/src/mainboard/intel/baskingridge/acpi_tables.c
+++ b/src/mainboard/intel/baskingridge/acpi_tables.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <types.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl
index 8957f752a1..0eae213c0d 100644
--- a/src/mainboard/intel/baskingridge/dsdt.asl
+++ b/src/mainboard/intel/baskingridge/dsdt.asl
@@ -3,7 +3,7 @@
#define ENABLE_TPM
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
DefinitionBlock(
"dsdt.aml",
"DSDT",
diff --git a/src/mainboard/intel/baskingridge/mainboard.c b/src/mainboard/intel/baskingridge/mainboard.c
index db86877de3..3717dd041e 100644
--- a/src/mainboard/intel/baskingridge/mainboard.c
+++ b/src/mainboard/intel/baskingridge/mainboard.c
@@ -4,7 +4,7 @@
#include <types.h>
#include <device/device.h>
#include <drivers/intel/gma/int15.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/io.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/baskingridge/mainboard_smi.c b/src/mainboard/intel/baskingridge/mainboard_smi.c
index 5eef5eb31a..d3b1576953 100644
--- a/src/mainboard/intel/baskingridge/mainboard_smi.c
+++ b/src/mainboard/intel/baskingridge/mainboard_smi.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/lynxpoint/nvs.h>