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authorGabe Black <gabeblack@google.com>2013-06-22 19:43:40 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 22:49:33 +0200
commitcf7509cfd1c775f4ee664f7784257c73bffd1513 (patch)
tree2d4b84fe48332b3e8ed5d332bc56629577362aa6 /src/mainboard/intel/baskingridge/chromeos.c
parent7dd581494dbaff64e4a2dd31f29cb254104d2d03 (diff)
exynos5420: Fix the way the rate of the input clock for i2c buses is found.
The clock divider was being read from registers incorrectly which meant that the periph rate was wrong. Change-Id: I50efb62849ef29bdfb0efc56c49642d3edca094c Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3699 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/baskingridge/chromeos.c')
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