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authorV Sowmya <v.sowmya@intel.com>2020-11-06 14:39:18 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-11-07 08:55:01 +0000
commit14e34fb10b52ddf078f45d6b5791b285a8d4eee1 (patch)
tree1ad25fd1075566ee8dd4bf60f5893b868dd3b321 /src/mainboard/intel/adlrvp
parent9e0dd96e7e457943629ef54b34fb14fd207069e2 (diff)
mb/intel/adlrvp: Configure the HPD GPIO's
This patch configures the HPD1 and HPD2 GPIO's. BUG=b:170607415 TEST=Built and booted adlrvp. Verified the hotplug functionality is working. Change-Id: Ied2d4c56220212a15103e9a2fbd01ce6f0811a74 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47290 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp')
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c b/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c
index e142e88e57..c7029fc10b 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c
@@ -277,6 +277,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2),
+ /* HPD_1 (A19) and HPD_2 (A20) pins */
+ PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
+ PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
+
/* IMGCLKOUT */
PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),