diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-10-05 21:04:22 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-08 04:10:37 +0000 |
| commit | efc40090f5711ea53df086606bf20ea8f476f871 (patch) | |
| tree | 5aa8ac61484260a5544ebb88d60d093671dac34f /src/mainboard/intel/adlrvp/dsdt.asl | |
| parent | 58222d156a2609bdc3e78222c9bf03a0697d6c2a (diff) | |
mb/intel/adlrvp: Add initial ADL-P mainboard code
List of changes:
1. Initial code block to select SOC_INTEL_ALDERLAKE Kconfig
2. Add minimum code to make ADL-P RVP build successfully
3. Mainly bootblock and verstage code added to reach till verstage
4. Add support for 2 mainboards as ADL-P board with default EC (Windows
SKU) and Chrome EC (Chrome SKU)
5. Add empty dsdt.asl to avoid compilation error
TEST=Able to build and boot ADL-P RVP till romstage early.
Change-Id: I2b551f48a4eb4d621d9a86c5d189c517d5610069
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/dsdt.asl')
| -rw-r--r-- | src/mainboard/intel/adlrvp/dsdt.asl | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/dsdt.asl b/src/mainboard/intel/adlrvp/dsdt.asl new file mode 100644 index 0000000000..fca3242891 --- /dev/null +++ b/src/mainboard/intel/adlrvp/dsdt.asl @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, /* DSDT revision: ACPI v2.0 and up */ + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 /* OEM revision */ +) +{ + +} |