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authorCliff Huang <cliff.huang@intel.corp-partner.google.com>2022-04-28 18:43:43 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-06-10 13:13:30 +0000
commitc675d410e706d2e0a47d122a96d19f0b2253d10e (patch)
treefa12b286dab23d6bdb981e6f92b3680a94c1a5ee /src/mainboard/intel/adlrvp/devicetree.cb
parent6c6be42c9fe1e03550aae6bf33bd8357021831b9 (diff)
mb/intel/adlrvp: disable unused root port 1, 3, 4 for Adl-P RVP
In Adl-P RVP, those interfaces are used as USB ports. BRANCH=firmware-brya-14505.B Signed-off-by: Cliff Huang <cliff.huang@intel.corp-partner.google.com> Change-Id: I322280ab02361e3a2a5925d69f33b23453d36dbf Reviewed-on: https://review.coreboot.org/c/coreboot/+/63946 Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com> Reviewed-by: Jeremy Compostella <jeremy.compostella@intel.corp-partner.google.com> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/devicetree.cb')
-rw-r--r--src/mainboard/intel/adlrvp/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index df4ac6046a..7afe27914f 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -425,9 +425,6 @@ chip soc/intel/alderlake
device i2c 36 on end
end
end
- device ref pcie_rp1 on end
- device ref pcie_rp3 on end # W/A to FSP issue
- device ref pcie_rp4 on end # W/A to FSP issue
device ref pcie_rp5 on end
device ref pcie_rp6 on end
device ref pcie_rp8 on end