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authorKrishna Prasad Bhat <krishna.p.bhat.d@intel.com>2021-12-06 15:59:39 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-12-15 23:20:10 +0000
commite3fd52a802f7877b4d2169414f08b7164fd94fbb (patch)
treefc221faa7c2e9fb9a2748a885048767571b125f1 /src/mainboard/intel/adlrvp/Kconfig
parentfc373c7dac077397a24f0930b83b805fc21fa270 (diff)
mb/intel/adlrvp_n: Add initial code for adl-n variant board
This patch adds the following list of changes: 1. Create a new devicetree for adlrvp-n and copy contents of adlrvp-p devictree. 2. Add support for 2 mainboards as ADL-N board with default EC (Windows SKU) and Chrome EC (Chrome SKU) and copy overridetree contents from adlrvp-p. 3. Add mainboard Kconfig to Kconfig.name file 4. Handle mainboard names in Kconfig file for ADLRVP N 5. Add config options to pick the adlrvp_n devicetree Change-Id: I4abf3bf62ec0398ae75e21575a2fab0d44b5c7ad Signed-off-by: Usha P <usha.p@intel.com> Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59915 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/Kconfig')
-rw-r--r--src/mainboard/intel/adlrvp/Kconfig20
1 files changed, 18 insertions, 2 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 498fbc2a6e..cddea56538 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -58,6 +58,18 @@ config BOARD_INTEL_ADLRVP_M_EXT_EC
select SOC_INTEL_ALDERLAKE_PCH_M
select SPI_TPM
+config BOARD_INTEL_ADLRVP_N
+ select BOARD_INTEL_ADLRVP_COMMON
+ select DRIVERS_UART_8250IO
+ select MAINBOARD_USES_IFD_EC_REGION
+ select SOC_INTEL_ALDERLAKE_PCH_N
+
+config BOARD_INTEL_ADLRVP_N_EXT_EC
+ select BOARD_INTEL_ADLRVP_COMMON
+ select DRIVERS_INTEL_PMC
+ select INTEL_LPSS_UART_FOR_CONSOLE
+ select SOC_INTEL_ALDERLAKE_PCH_N
+
if BOARD_INTEL_ADLRVP_COMMON
config CHROMEOS
@@ -77,11 +89,14 @@ config VARIANT_DIR
default "adlrvp_p_mchp" if BOARD_INTEL_ADLRVP_P_MCHP
default "adlrvp_m" if BOARD_INTEL_ADLRVP_M
default "adlrvp_m_ext_ec" if BOARD_INTEL_ADLRVP_M_EXT_EC
+ default "adlrvp_n" if BOARD_INTEL_ADLRVP_N
+ default "adlrvp_n_ext_ec" if BOARD_INTEL_ADLRVP_N_EXT_EC
config GBB_HWID
string
depends on CHROMEOS
default "ADLRVPM" if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
+ default "ADLRVPN" if BOARD_INTEL_ADLRVP_N || BOARD_INTEL_ADLRVP_N_EXT_EC
default "ADLRVPP"
config MAINBOARD_PART_NUMBER
@@ -97,6 +112,7 @@ config MAINBOARD_FAMILY
config DEVICETREE
default "devicetree_m.cb" if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
+ default "devicetree_n.cb" if BOARD_INTEL_ADLRVP_N || BOARD_INTEL_ADLRVP_N_EXT_EC
default "devicetree.cb"
config OVERRIDE_DEVICETREE
@@ -107,8 +123,8 @@ config DIMM_SPD_SIZE
choice
prompt "ON BOARD EC"
- default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M
- default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP
+ default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_N
+ default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP || BOARD_INTEL_ADLRVP_N_EXT_EC
help
This option allows you to select the on board EC to use.
Select whether the board has Intel EC or Chrome EC