diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-03-12 12:52:42 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-15 06:03:55 +0000 |
| commit | 8996b277abcdf8eb9d99f302dd3dddab5633a465 (patch) | |
| tree | f791ccf01dfe87daaa6686bb072c2cb0e6258b79 /src/mainboard/intel/adlrvp/Kconfig | |
| parent | 7b97289d56e4758b97ea91990418bc03af14ac5c (diff) | |
mb/intel/adlrvp: Select ADL_ENABLE_USB4_PCIE_RESOURCES
This change select the Kconfig to pre-allocate the Intel-recommended bus
and memory resources per-PCIe TBT root port for the adlrvp mainboard.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ic56ebab02e50a466662a07d122d8f40eaf16b54b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51461
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/Kconfig')
| -rw-r--r-- | src/mainboard/intel/adlrvp/Kconfig | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index 295b56fa58..a359d62145 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -2,6 +2,7 @@ if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M | config BOARD_SPECIFIC_OPTIONS def_bool y + select ADL_ENABLE_USB4_PCIE_RESOURCES select BOARD_ROMSIZE_KB_32768 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES @@ -84,21 +85,6 @@ config ADL_INTEL_EC select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT endchoice -config PCIEXP_HOTPLUG - default y - -config PCIEXP_HOTPLUG_BUSES - int - default 42 - -config PCIEXP_HOTPLUG_MEM - hex - default 0xc200000 # 194 MiB - -config PCIEXP_HOTPLUG_PREFETCH_MEM - hex - default 0x1c000000 # 448 MiB - config VBOOT select VBOOT_LID_SWITCH select VBOOT_MOCK_SECDATA |