diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2022-05-23 18:09:30 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-07 12:48:47 +0000 |
| commit | 6fbdedd1d240ab6958017c3dd28f1d3cfc99efc5 (patch) | |
| tree | 2f848f3d1469177e4447b2c6a926035afd0c9afb /src/mainboard/intel/adlrvp/Kconfig | |
| parent | 225e79b9604ceef06a14df4feb28c3db8b145562 (diff) | |
mb/intel/adlrvp: Add initial code for adlrvp with raptorlake silicon
Take adlrvp_p as a baseline code and add a new variant of ADL RVP
with Raptor Lake silicon.
BUG=b:229134437
BRANCH=firmware-brya-14505.B
TEST=build adlrvp_rpl_ext_ec
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I880abe0f300118f461523173cc0d50a2fbc99e72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/Kconfig')
| -rw-r--r-- | src/mainboard/intel/adlrvp/Kconfig | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index 11ec375283..2a81c035d8 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -32,6 +32,13 @@ config BOARD_INTEL_ADLRVP_P_EXT_EC select SOC_INTEL_ALDERLAKE_PCH_P select GEN3_EXTERNAL_CLOCK_BUFFER +config BOARD_INTEL_ADLRVP_RPL_EXT_EC + select BOARD_INTEL_ADLRVP_COMMON + select DRIVERS_INTEL_PMC + select INTEL_LPSS_UART_FOR_CONSOLE + select SOC_INTEL_ALDERLAKE_PCH_P + select GEN3_EXTERNAL_CLOCK_BUFFER + config BOARD_INTEL_ADLRVP_P_MCHP select BOARD_INTEL_ADLRVP_COMMON select DRIVERS_INTEL_MIPI_CAMERA @@ -88,6 +95,7 @@ config MAINBOARD_DIR config VARIANT_DIR default "adlrvp_p" if BOARD_INTEL_ADLRVP_P default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC + default "adlrvp_rpl_ext_ec" if BOARD_INTEL_ADLRVP_RPL_EXT_EC default "adlrvp_p_mchp" if BOARD_INTEL_ADLRVP_P_MCHP default "adlrvp_m" if BOARD_INTEL_ADLRVP_M default "adlrvp_m_ext_ec" if BOARD_INTEL_ADLRVP_M_EXT_EC @@ -126,7 +134,7 @@ config DIMM_SPD_SIZE choice prompt "ON BOARD EC" default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_N - default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP || BOARD_INTEL_ADLRVP_N_EXT_EC + default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP || BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_RPL_EXT_EC help This option allows you to select the on board EC to use. Select whether the board has Intel EC or Chrome EC @@ -146,7 +154,7 @@ endchoice config VBOOT select VBOOT_LID_SWITCH - select VBOOT_MOCK_SECDATA if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_N_EXT_EC + select VBOOT_MOCK_SECDATA if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_P_EXT_EC select EC_GOOGLE_CHROMEEC_SWITCHES if ADL_CHROME_EC select VBOOT_EARLY_EC_SYNC if BOARD_INTEL_ADLRVP_M_EXT_EC |