summaryrefslogtreecommitdiff
path: root/src/mainboard/iei
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-11-22 15:57:57 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-22 15:57:57 +0000
commit0d5a6accc84530d44f35ba4f3a74b370a1f88f86 (patch)
tree13267fee11e95bd5081a47995efc0afe567a9ee2 /src/mainboard/iei
parent7411eabcdb544205316dfa90e7e708b4b0495074 (diff)
Drop per-board ram_check() calls for now.
Every board had a slightly different invokation, very often commented out anyway. We could either decide that this is only to be used by developers during bringup (and thus added manually to romstage.c and removed before the board gets committed). This method seems to be preferred from what I have heard on IRC / mailing list in the past. Or, we add the ram_check() somewhere globally and allow the user to enable it via menuconfig (possibly only if EXPERT is selected). Either way, the current method of spreading the calls all over the place is not really the way to go. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iei')
-rw-r--r--src/mainboard/iei/juki-511p/romstage.c2
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/romstage.c3
-rw-r--r--src/mainboard/iei/nova4899r/romstage.c2
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/romstage.c2
4 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/iei/juki-511p/romstage.c b/src/mainboard/iei/juki-511p/romstage.c
index 6bde6756c4..a5019ce095 100644
--- a/src/mainboard/iei/juki-511p/romstage.c
+++ b/src/mainboard/iei/juki-511p/romstage.c
@@ -25,7 +25,6 @@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
-#include "lib/ramtest.c"
#include "superio/winbond/w83977f/w83977f_early_serial.c"
#include "southbridge/amd/cs5530/cs5530_enable_rom.c"
#include "cpu/x86/bist.h"
@@ -47,5 +46,4 @@ static void main(unsigned long bist)
cs5530_enable_rom();
sdram_init();
- /* ram_check(0x00000000, 640 * 1024); */
}
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index 5afa651e05..8ef205aab7 100644
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -219,9 +219,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200);
*/
-// ram_check(0x00200000, 0x00200000 + (640 * 1024));
-// ram_check(0x40200000, 0x40200000 + (640 * 1024));
-
// die("After MCT init before CAR disabled.");
rs780_before_pci_init();
diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c
index 0900f4ba3e..1d99197293 100644
--- a/src/mainboard/iei/nova4899r/romstage.c
+++ b/src/mainboard/iei/nova4899r/romstage.c
@@ -25,7 +25,6 @@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
-#include "lib/ramtest.c"
#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
#include "southbridge/amd/cs5530/cs5530_enable_rom.c"
#include "cpu/x86/bist.h"
@@ -42,5 +41,4 @@ static void main(unsigned long bist)
report_bist_failure(bist);
cs5530_enable_rom();
sdram_init();
- /* ram_check(0x00000000, 640 * 1024); */
}
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index 4e27f9bbbd..0c06fd2432 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -87,8 +87,6 @@ void main(unsigned long bist)
sdram_initialize(1, memctrl);
- /* ram_check(0, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
return;
}