newconfig is no more.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 0 insertions, 242 deletions

diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Config.lb b/src/mainboard/iei/pcisa-lx-800-r10/Config.lb
deleted file mode 100644
index 39fc0df5ac..0000000000
--- a/src/mainboard/iei/pcisa-lx-800-r10/Config.lb
+++ /dev/null
@@ -1,136 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-## CONFIG_XIP_ROM_SIZE must be a power of 2.
-default CONFIG_XIP_ROM_SIZE = 64 * 1024
-include /config/nofailovercalculation.lb
-
-arch i386 end
-driver mainboard.o
-if CONFIG_GENERATE_PIRQ_TABLE
-	object irq_tables.o
-end
-	# Compile cache_as_ram.c to auto.inc.
-	makerule ./cache_as_ram_auto.inc
-			# depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
-			depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c"
-			action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
-			action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
-			action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
-	end
-mainboardinit cpu/x86/16bit/entry16.inc
-mainboardinit cpu/x86/32bit/entry32.inc
-ldscript /cpu/x86/16bit/entry16.lds
-ldscript /cpu/x86/32bit/entry32.lds
-if CONFIG_USE_FALLBACK_IMAGE
-	mainboardinit cpu/x86/16bit/reset16.inc
-	ldscript /cpu/x86/16bit/reset16.lds
-else
-	mainboardinit cpu/x86/32bit/reset32.inc
-	ldscript /cpu/x86/32bit/reset32.lds
-end
-mainboardinit arch/i386/lib/id.inc
-ldscript /arch/i386/lib/id.lds
-if CONFIG_USE_FALLBACK_IMAGE
-	ldscript /arch/i386/lib/failover.lds
-#	mainboardinit ./failover.inc
-end
-mainboardinit cpu/x86/fpu_enable.inc
-	mainboardinit cpu/amd/model_lx/cache_as_ram.inc
-	mainboardinit ./cache_as_ram_auto.inc
-dir /pc80
-config chip.h
-
-chip northbridge/amd/lx
-	device pci_domain 0 on
-		device pci 1.0 on end				# Northbridge
-		device pci 1.1 on end				# Graphics
-		chip southbridge/amd/cs5536
-			# IRQ 12 and 1 unmasked,  Keyboard and Mouse IRQs. OK
-			# SIRQ Mode = Active(Quiet) mode. Save power....
-			# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse, UARTs, etc IRQs. OK
-			register "lpc_serirq_enable" = "0x0000105a"
-			register "lpc_serirq_polarity" = "0x0000EFA5"
-			register "lpc_serirq_mode" = "1"
-			register "enable_gpio_int_route" = "0x0D0C0700"
-			register "enable_ide_nand_flash" = "0"	# 0:ide mode, 1:flash
-			register "enable_USBP4_device" = "1"	# 0: host, 1:device
-			register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381)
-			register "com1_enable" = "0"
-			register "com1_address" = "0x3F8"
-			register "com1_irq" = "4"
-			register "com2_enable" = "0"
-			register "com2_address" = "0x2F8"
-			register "com2_irq" = "3"
-			register "unwanted_vpci[0]" = "0"	# End of list has a zero
-			device pci 9.0 on end			# Slot1
-			device pci a.0 on end			# Slot2
-			device pci b.0 on end			# Slot3
-			device pci c.0 on end			# Slot4
-			device pci e.0 on end			# Ethernet 0
-			device pci 10.0 on end			# Ethernet 1
-			device pci 11.0 on end			# SATA
-			device pci f.0 on			# ISA Bridge
-				chip superio/winbond/w83627hf
-					device pnp 2e.0 off	# Floppy
-						io 0x60 = 0x3f0
-						irq 0x70 = 6
-						drq 0x74 = 2
-					end
-					device pnp 2e.1 off	# Parallel port
-						io 0x60 = 0x378
-						irq 0x70 = 7
-					end
-					device pnp 2e.2 on	# Com1
-						io 0x60 = 0x3f8
-						irq 0x70 = 4
-					end
-					device pnp 2e.3 on	# Com2
-						io 0x60 = 0x2f8
-						irq 0x70 = 3
-					end
-					device pnp 2e.5 on	# Keyboard
-						io 0x60 = 0x60
-						io 0x62 = 0x64
-						irq 0x70 = 1
-						irq 0x72 = 12
-					end
-					device pnp 2e.6 off end	# CIR
-					device pnp 2e.7 off end	# GAME_MIDI_GIPO1
-					device pnp 2e.8 off end	# GPIO2
-					device pnp 2e.9 off end	# GPIO3
-					device pnp 2e.a off end	# ACPI
-					device pnp 2e.b off end	# HW Monitor
-				end
-			end
-			device pci f.2 on end			# IDE Controller
-			device pci f.3 on end			# Audio
-			device pci f.4 on end			# OHCI
-			device pci f.5 on end			# EHCI
-		end
-	end
-	# APIC cluster is late CPU init.
-	device apic_cluster 0 on
-		chip cpu/amd/model_lx
-			device apic 0 on end
-		end
-	end
-end
-
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Options.lb b/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
deleted file mode 100644
index 6ff46bfba7..0000000000
--- a/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
+++ /dev/null
@@ -1,106 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-uses CONFIG_GENERATE_MP_TABLE
-uses CONFIG_GENERATE_PIRQ_TABLE
-uses CONFIG_USE_FALLBACK_IMAGE
-uses CONFIG_HAVE_FALLBACK_BOOT
-uses CONFIG_HAVE_HARD_RESET
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_USE_OPTION_TABLE
-uses CONFIG_ROM_PAYLOAD
-uses CONFIG_IRQ_SLOT_COUNT
-uses CONFIG_MAINBOARD
-uses CONFIG_MAINBOARD_VENDOR
-uses CONFIG_MAINBOARD_PART_NUMBER
-uses COREBOOT_EXTRA_VERSION
-uses CONFIG_ARCH
-uses CONFIG_FALLBACK_SIZE
-uses CONFIG_STACK_SIZE
-uses CONFIG_HEAP_SIZE
-uses CONFIG_ROM_SIZE
-uses CONFIG_ROM_SECTION_SIZE
-uses CONFIG_ROM_IMAGE_SIZE
-uses CONFIG_ROM_SECTION_SIZE
-uses CONFIG_ROM_SECTION_OFFSET
-uses CONFIG_COMPRESS
-uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
-uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses CONFIG_ROMBASE
-uses CONFIG_RAMBASE
-uses CONFIG_XIP_ROM_SIZE
-uses CONFIG_XIP_ROM_BASE
-uses CONFIG_GENERATE_MP_TABLE
-uses CONFIG_CROSS_COMPILE
-uses CC
-uses HOSTCC
-uses CONFIG_OBJCOPY
-uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
-uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
-uses CONFIG_CONSOLE_SERIAL8250
-uses CONFIG_TTYS0_BAUD
-uses CONFIG_TTYS0_BASE
-uses CONFIG_TTYS0_LCS
-uses CONFIG_UDELAY_IO
-uses CONFIG_CONSOLE_VGA
-uses CONFIG_PCI_ROM_RUN
-uses CONFIG_VIDEO_MB
-uses CONFIG_USE_DCACHE_RAM
-uses CONFIG_DCACHE_RAM_BASE
-uses CONFIG_DCACHE_RAM_SIZE
-uses CONFIG_USE_PRINTK_IN_CAR
-uses CONFIG_PIRQ_ROUTE
-
-default CONFIG_ROM_SIZE = 256 * 1024
-default CONFIG_CONSOLE_VGA = 0
-default CONFIG_VIDEO_MB = 8
-default CONFIG_PCI_ROM_RUN = 0
-default CONFIG_HAVE_FALLBACK_BOOT = 1
-default CONFIG_GENERATE_MP_TABLE = 0
-default CONFIG_HAVE_HARD_RESET = 0
-default CONFIG_UDELAY_IO = 1
-default CONFIG_GENERATE_PIRQ_TABLE = 1
-default CONFIG_IRQ_SLOT_COUNT = 9
-default CONFIG_PIRQ_ROUTE = 1
-default CONFIG_HAVE_OPTION_TABLE = 0
-default CONFIG_ROM_IMAGE_SIZE = 32 * 1024
-default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
-default CONFIG_USE_DCACHE_RAM = 1
-default CONFIG_DCACHE_RAM_BASE = 0xc8000
-default CONFIG_DCACHE_RAM_SIZE = 32 * 1024
-default CONFIG_USE_PRINTK_IN_CAR=1
-default CONFIG_STACK_SIZE = 8 * 1024
-default CONFIG_HEAP_SIZE = 16 * 1024
-# default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
-default CONFIG_USE_OPTION_TABLE = 0
-default CONFIG_RAMBASE = 0x00004000
-default CONFIG_ROM_PAYLOAD = 1
-default CONFIG_CROSS_COMPILE = ""
-default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
-default HOSTCC = "gcc"
-default CONFIG_CONSOLE_SERIAL8250 = 1
-default CONFIG_TTYS0_BAUD = 115200
-default CONFIG_TTYS0_BASE = 0x3f8
-default CONFIG_TTYS0_LCS = 0x3
-default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
-default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
-
-end