diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-04 06:49:00 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-05 12:44:12 +0000 |
commit | 64aa881263fa3fdec827a3f7adf04b138ab82ff1 (patch) | |
tree | f23ae6c0868089cc443d12cec2618f471c0efe77 /src/mainboard/iei/pcisa-lx-800-r10/romstage.c | |
parent | 88af0f38eb19f956e8df2b62254c10c7603a9a33 (diff) |
amd/geode_lx: Remove most boards
There is active work to convert remaining two boards,
PC Engines alix1c and alix2d, to EARLY_CBMEM_INIT.
Change-Id: I87e3963af7ef719e9fa2a8b0df34a896265905f0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/iei/pcisa-lx-800-r10/romstage.c')
-rw-r--r-- | src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c deleted file mode 100644 index 67b5266bac..0000000000 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <stdlib.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include <cpu/x86/bist.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/car.h> -#include <cpu/amd/lxdef.h> -#include <southbridge/amd/cs5536/cs5536.h> -#include <spd.h> -#include <superio/winbond/common/winbond.h> -#include <superio/winbond/w83627hf/w83627hf.h> -#include <northbridge/amd/lx/raminit.h> - -#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) - -int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/amd/lx/pll_reset.c" -#include "cpu/amd/geode_lx/cpureginit.c" -#include "cpu/amd/geode_lx/syspreinit.c" -#include "cpu/amd/geode_lx/msrinit.c" - -void asmlinkage mainboard_romstage_entry(unsigned long bist) -{ - - static const struct mem_controller memctrl[] = { - {.channel0 = {DIMM0, DIMM1}} - }; - - SystemPreInit(); - msr_init(); - - cs5536_early_setup(); - - /* Note: must do this AFTER the early_setup! It is counting on some - * early MSR setup for CS5536. - */ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ - report_bist_failure(bist); - - pll_reset(); - - cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); - - sdram_initialize(1, memctrl); - - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ -} |