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authorStefan Reinauer <stepan@coresystems.de>2010-02-08 12:20:50 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-08 12:20:50 +0000
commit38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0 (patch)
treeecb680abac7c73798a4abf5f5733c6ad3e179bb4 /src/mainboard/iei/nova4899r/auto.c
parentd51eddbb6611965165ad72eb3fb04377a51ab64a (diff)
janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iei/nova4899r/auto.c')
-rw-r--r--src/mainboard/iei/nova4899r/auto.c58
1 files changed, 0 insertions, 58 deletions
diff --git a/src/mainboard/iei/nova4899r/auto.c b/src/mainboard/iei/nova4899r/auto.c
deleted file mode 100644
index 0b15c3f40b..0000000000
--- a/src/mainboard/iei/nova4899r/auto.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Luis Correia <luis.f.correia@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define ASSEMBLY 1
-#define __PRE_RAM__
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
-#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
-#include "southbridge/amd/cs5530/cs5530_enable_rom.c"
-#include "cpu/x86/bist.h"
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-#include "northbridge/amd/gx1/raminit.c"
-
-static void main(unsigned long bist)
-{
- /* Initialize the serial console. */
- w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
- console_init();
-
- /* Halt if there was a built in self test failure. */
- report_bist_failure(bist);
-
- cs5530_enable_rom();
-
- /* Initialize RAM. */
- sdram_init();
-
- /* Check RAM. */
- /* ram_check(0x00000000, 640 * 1024); */
-}