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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-10 07:33:36 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-26 23:22:17 +0100 |
| commit | 142b52cd322ff69afe974f90a446f62b193d120c (patch) | |
| tree | bada24c0b138e115ebb705409dd7173f1640ac30 /src/mainboard/ibm | |
| parent | 88a67f0cc9d0bec08a6cfa5b1c3f4198fd98ab4f (diff) | |
AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes
Change-Id: Ib3a69e3364418426438f88ba14e5cf744e2414fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4524
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/ibm')
| -rw-r--r-- | src/mainboard/ibm/e325/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/ibm/e326/romstage.c | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c index e68c2dbf48..b44668a5ca 100644 --- a/src/mainboard/ibm/e325/romstage.c +++ b/src/mainboard/ibm/e325/romstage.c @@ -56,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c index 774845d703..c703b7aff4 100644 --- a/src/mainboard/ibm/e326/romstage.c +++ b/src/mainboard/ibm/e326/romstage.c @@ -56,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |