Simplify a few code chunks, fix whitespace and indentation.

Also, remove some less useful comments, some dead code / unused functions.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 20 insertions, 32 deletions

diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c
index 56777e6274..49dce1412b 100644
--- a/src/mainboard/ibm/e325/romstage.c
+++ b/src/mainboard/ibm/e325/romstage.c
@@ -29,13 +29,13 @@
 static void memreset_setup(void)
 {
 	if (is_cpu_pre_c0()) {
-		/* Set the memreset low */
-		outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16);
-		/* Ensure the BIOS has control of the memory lines */
-		outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
+		/* Set the memreset low. */
+		outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16);
+		/* Ensure the BIOS has control of the memory lines. */
+		outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
 	} else {
-		/* Ensure the CPU has controll of the memory lines */
-		outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17);
+		/* Ensure the CPU has control of the memory lines. */
+		outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17);
 	}
 }
 
@@ -43,16 +43,13 @@ static void memreset(int controllers, const struct mem_controller *ctrl)
 {
 	if (is_cpu_pre_c0()) {
 		udelay(800);
-		/* Set memreset_high */
-		outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16);
+		/* Set memreset high. */
+		outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16);
 		udelay(90);
 	}
 }
 
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-	/* nothing to do */
-}
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
 
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
@@ -99,15 +96,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
-
 		enumerate_ht_chain();
-
 		amd8111_enable_rom();
         }
 
-        if (bist == 0) {
+        if (bist == 0)
 		init_cpus(cpu_init_detectedx);
-        }
 
 	pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c
index f9a706d718..48bfcc5f83 100644
--- a/src/mainboard/ibm/e326/romstage.c
+++ b/src/mainboard/ibm/e326/romstage.c
@@ -29,13 +29,13 @@
 static void memreset_setup(void)
 {
 	if (is_cpu_pre_c0()) {
-		/* Set the memreset low */
-		outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16);
-		/* Ensure the BIOS has control of the memory lines */
-		outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
+		/* Set the memreset low. */
+		outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16);
+		/* Ensure the BIOS has control of the memory lines. */
+		outb((1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
 	} else {
-		/* Ensure the CPU has controll of the memory lines */
-		outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17);
+		/* Ensure the CPU has control of the memory lines. */
+		outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17);
 	}
 }
 
@@ -43,16 +43,13 @@ static void memreset(int controllers, const struct mem_controller *ctrl)
 {
 	if (is_cpu_pre_c0()) {
 		udelay(800);
-		/* Set memreset_high */
-		outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16);
+		/* Set memreset high. */
+		outb((1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16);
 		udelay(90);
 	}
 }
 
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-	/* nothing to do */
-}
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
 
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
@@ -99,15 +96,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
-
 		enumerate_ht_chain();
-
 		amd8111_enable_rom();
         }
 
-        if (bist == 0) {
+        if (bist == 0)
 		init_cpus(cpu_init_detectedx);
-        }
 
 	pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();