diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2022-05-02 09:55:20 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-05-28 20:12:17 +0000 |
| commit | 30e743e7cc7f8f26867ddd3d2e8ab7e86368499b (patch) | |
| tree | c1b19839af2a7e2d2a2da78d11c1685168b5a284 /src/mainboard/ibm/sbp1/devicetree.cb | |
| parent | c7338085feaba70d9f67d2dd797624cddae84e7c (diff) | |
mb/ibm: Add 4 SPR sockets server board IBM SBP1
The IBM SBP1 is an evaluation platform.
It's utilising:
- 4 SPR sockets, having 16 DIMMs each
- 240C/480T at maximum
- 32x CPU PCIe slots
- 2x M.2 PCH PCIe slots
- Dual 200Gbit/s NIC
- SPI TPM
It has an AST2600 BMC for remote management.
It doesn't have:
- External facing USB ports
- Video outputs
- Audio codec
Test:
The board boots to Linux 5.15 with all 480 cores available.
All PCIe devices are working and no errors in ACPI.
All 64 memory DIMMS are working and M.2 devices can be used.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: Ie21c744224e8d9e5232d63b8366d2981c9575d70
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73392
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/ibm/sbp1/devicetree.cb')
| -rw-r--r-- | src/mainboard/ibm/sbp1/devicetree.cb | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/mainboard/ibm/sbp1/devicetree.cb b/src/mainboard/ibm/sbp1/devicetree.cb new file mode 100644 index 0000000000..098fd9a8eb --- /dev/null +++ b/src/mainboard/ibm/sbp1/devicetree.cb @@ -0,0 +1,36 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +chip soc/intel/xeon_sp/spr + + device domain 0 on + device pci 16.3 off end # Serial controller: Intel Corporation Device 1be3 + + device pci 1f.0 on # Intel device 1b81: PCH eSPI controller + chip superio/common + device pnp 2e.0 on + chip superio/aspeed/ast2400 + register "use_espi" = "1" + device pnp 2e.2 on # SUART1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 on # SUART2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + end + end + end + chip drivers/ipmi # BMC KCS + device pnp ca2.0 on end + register "bmc_i2c_address" = "0x20" + register "bmc_boot_timeout" = "60" + end + chip drivers/pc80/tpm # TPM + device pnp 0c31.0 on end + end + end + device pci 1f.3 off end # Intel device 1bc8: PCH audio + device pci 1f.6 off end # Intel device 1bcb: PCH GbE controller + end +end |