summaryrefslogtreecommitdiff
path: root/src/mainboard/ibm/e325/failover.c
diff options
context:
space:
mode:
authorRonald G. Minnich <rminnich@gmail.com>2004-03-18 22:00:56 +0000
committerRonald G. Minnich <rminnich@gmail.com>2004-03-18 22:00:56 +0000
commit5136e1500114b7b2dcfb2eb644bed2fc242e82a1 (patch)
tree72d928aedf9445725f8c1f048f1d4f4c37db15d1 /src/mainboard/ibm/e325/failover.c
parent62705ff974fc37241ae992676b11856a30c29ed0 (diff)
e325 support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibm/e325/failover.c')
-rw-r--r--src/mainboard/ibm/e325/failover.c80
1 files changed, 80 insertions, 0 deletions
diff --git a/src/mainboard/ibm/e325/failover.c b/src/mainboard/ibm/e325/failover.c
new file mode 100644
index 0000000000..b22abfea06
--- /dev/null
+++ b/src/mainboard/ibm/e325/failover.c
@@ -0,0 +1,80 @@
+#define ASSEMBLY 1
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <arch/smp/lapic.h>
+#include "pc80/mc146818rtc_early.c"
+#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
+#include "northbridge/amd/amdk8/early_ht.c"
+#include "cpu/p6/boot_cpu.c"
+#include "northbridge/amd/amdk8/reset_test.c"
+
+#define HAVE_REGPARM_SUPPORT 0
+#if HAVE_REGPARM_SUPPORT
+static unsigned long main(unsigned long bist)
+{
+#else
+static void main(void)
+{
+ unsigned long bist = 0;
+#endif
+ /* Make cerain my local apic is useable */
+ enable_lapic();
+
+ /* Is this a cpu only reset? */
+ if (cpu_init_detected()) {
+ if (last_boot_normal()) {
+ goto normal_image;
+ } else {
+ goto cpu_reset;
+ }
+ }
+ /* Is this a secondary cpu? */
+ if (!boot_cpu()) {
+ if (last_boot_normal()) {
+ goto normal_image;
+ } else {
+ goto fallback_image;
+ }
+ }
+
+
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+ enumerate_ht_chain();
+
+ /* Setup the 8111 */
+ amd8111_enable_rom();
+
+ /* Is this a deliberate reset by the bios */
+ if (bios_reset_detected() && last_boot_normal()) {
+ goto normal_image;
+ }
+ /* This is the primary cpu how should I boot? */
+ else if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
+ }
+ normal_image:
+ asm("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+#if HAVE_REGPARM_SUPPORT
+ return bist;
+#else
+ return;
+#endif
+}