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authorPeter Stuge <peter@stuge.se>2010-10-01 09:13:18 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-10-01 09:13:18 +0000
commite4bc0f648067606841e5b24ed0bfe4d921838aec (patch)
treef6ee2e3ea9c6064ef31d9ebc072ba53fa4480bd5 /src/mainboard/ibase
parentc2d0bfb4705b4fe3eb9332df00f01903f55d3521 (diff)
Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM
Both chipsets use the src/northbridge/intel/i945 code but that code needs to know which chipset is actually used. Having separate NORTHBRIDGE_ options allows the I945GC/I945GM choice to be removed since code can test the NORTHBRIDGE_ option directly. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibase')
-rw-r--r--src/mainboard/ibase/mb899/Kconfig3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig
index 26bd6c0b8f..b7ceebdacc 100644
--- a/src/mainboard/ibase/mb899/Kconfig
+++ b/src/mainboard/ibase/mb899/Kconfig
@@ -5,7 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_X86
select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478
- select NORTHBRIDGE_INTEL_I945
+ select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627EHG
select BOARD_HAS_FADT
@@ -20,7 +20,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CACHE_AS_RAM
select GFXUMA
select TINY_BOOTBLOCK
- select I945GM
select CHANNEL_XOR_RANDOMIZATION
config MAINBOARD_DIR