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authorBernhard M. Wiedemann <corebootbmw@lsmod.de>2010-05-30 12:56:17 +0000
committerStefan Reinauer <stepan@openbios.org>2010-05-30 12:56:17 +0000
commit6e554de0988fb1fd3e02aca6b6f2fc10c8fdc7ee (patch)
treeba9b96395e63bad1e1bfdd5ecd2d0cf9cc99ce42 /src/mainboard/ibase/mb899/cmos.layout
parent1c60c88679f692dee5e547e58b4124c8639d4f07 (diff)
This patch adds support for mainboard iBASE:MB899
based on Kontron 986LCD-M changed superIO chip to w83627ehg, dropping MIDI dropped second superIO at 4e changed superIO-addr from 2e to 4e adjusted irq_tables.c and devicetree.cb dropped setup of 3xGBit-Ethernet adjusted IRQ-map (using values from mainboard/intel/d945gclf) disabled parts about HD-audio (missing on that board) Signed-off-by: Bernhard M. Wiedemann <corebootbmw@lsmod.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibase/mb899/cmos.layout')
-rw-r--r--src/mainboard/ibase/mb899/cmos.layout194
1 files changed, 194 insertions, 0 deletions
diff --git a/src/mainboard/ibase/mb899/cmos.layout b/src/mainboard/ibase/mb899/cmos.layout
new file mode 100644
index 0000000000..b3e8c4e4ee
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+++ b/src/mainboard/ibase/mb899/cmos.layout
@@ -0,0 +1,194 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+# -----------------------------------------------------------------
+entries
+
+#start-bit length config config-ID name
+#0 8 r 0 seconds
+#8 8 r 0 alarm_seconds
+#16 8 r 0 minutes
+#24 8 r 0 alarm_minutes
+#32 8 r 0 hours
+#40 8 r 0 alarm_hours
+#48 8 r 0 day_of_week
+#56 8 r 0 day_of_month
+#64 8 r 0 month
+#72 8 r 0 year
+# -----------------------------------------------------------------
+# Status Register A
+#80 4 r 0 rate_select
+#84 3 r 0 REF_Clock
+#87 1 r 0 UIP
+# -----------------------------------------------------------------
+# Status Register B
+#88 1 r 0 auto_switch_DST
+#89 1 r 0 24_hour_mode
+#90 1 r 0 binary_values_enable
+#91 1 r 0 square-wave_out_enable
+#92 1 r 0 update_finished_enable
+#93 1 r 0 alarm_interrupt_enable
+#94 1 r 0 periodic_interrupt_enable
+#95 1 r 0 disable_clock_updates
+# -----------------------------------------------------------------
+# Status Register C
+#96 4 r 0 status_c_rsvd
+#100 1 r 0 uf_flag
+#101 1 r 0 af_flag
+#102 1 r 0 pf_flag
+#103 1 r 0 irqf_flag
+# -----------------------------------------------------------------
+# Status Register D
+#104 7 r 0 status_d_rsvd
+#111 1 r 0 valid_cmos_ram
+# -----------------------------------------------------------------
+# Diagnostic Status Register
+#112 8 r 0 diag_rsvd1
+
+# -----------------------------------------------------------------
+0 120 r 0 reserved_memory
+#120 264 r 0 unused
+
+# -----------------------------------------------------------------
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384 1 e 4 boot_option
+385 1 e 4 last_boot
+388 4 r 0 reboot_bits
+#390 2 r 0 unused?
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+392 3 e 5 baud_rate
+395 4 e 6 debug_level
+#399 1 r 0 unused
+
+# coreboot config options: cpu
+400 1 e 2 hyper_threading
+#401 7 r 0 unused
+
+# coreboot config options: southbridge
+408 1 e 1 nmi
+409 2 e 7 power_on_after_fail
+#411 5 r 0 unused
+
+# coreboot config options: bootloader
+416 512 s 0 boot_devices
+#928 40 r 0 unused
+
+# coreboot config options: mainboard specific options
+948 2 e 8 cpufan_cruise_control
+950 2 e 8 sysfan_cruise_control
+952 4 e 9 cpufan_speed
+#956 4 e 10 cpufan_temperature
+960 4 e 9 sysfan_speed
+#964 4 e 10 sysfan_temperature
+
+968 1 e 2 ethernet1
+969 1 e 2 ethernet2
+970 1 e 2 ethernet3
+
+#971 13 r 0 unused
+
+# coreboot config options: check sums
+984 16 h 0 check_sum
+#1000 24 r 0 amd_reserved
+
+# ram initialization internal data
+1024 8 r 0 C0WL0REOST
+1032 8 r 0 C1WL0REOST
+1040 8 r 0 RCVENMT
+1048 4 r 0 C0DRT1
+1052 4 r 0 C1DRT1
+
+# -----------------------------------------------------------------
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+5 0 115200
+5 1 57600
+5 2 38400
+5 3 19200
+5 4 9600
+5 5 4800
+5 6 2400
+5 7 1200
+6 1 Emergency
+6 2 Alert
+6 3 Critical
+6 4 Error
+6 5 Warning
+6 6 Notice
+6 7 Info
+6 8 Debug
+6 9 Spew
+7 0 Disable
+7 1 Enable
+7 2 Keep
+# Fan Cruise Control
+8 0 Disabled
+8 1 Speed
+#8 2 Thermal
+# Fan Speed (Rotations per Minute)
+9 0 5625
+9 1 5192
+9 2 4753
+9 3 4326
+9 4 3924
+9 5 3552
+9 6 3214
+9 7 2909
+9 8 2636
+9 9 2393
+9 10 2177
+9 11 1985
+9 12 1814
+9 13 1662
+9 14 1527
+9 15 1406
+#
+# Temperature (°C/°F)
+#10 0 30/86
+#10 1 33/91
+#10 2 36/96
+#10 3 39/102
+#10 4 42/107
+#10 5 45/113
+#10 6 48/118
+#10 7 51/123
+#10 8 54/129
+#10 9 57/134
+#10 10 60/140
+#10 11 63/145
+#10 12 66/150
+#10 13 69/156
+#10 14 72/161
+#10 15 75/167
+# -----------------------------------------------------------------
+checksums
+
+checksum 392 983 984
+
+