diff options
author | Bernhard M. Wiedemann <corebootbmw@lsmod.de> | 2010-05-30 12:56:17 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-05-30 12:56:17 +0000 |
commit | 6e554de0988fb1fd3e02aca6b6f2fc10c8fdc7ee (patch) | |
tree | ba9b96395e63bad1e1bfdd5ecd2d0cf9cc99ce42 /src/mainboard/ibase/mb899/acpi/thermal.asl | |
parent | 1c60c88679f692dee5e547e58b4124c8639d4f07 (diff) |
This patch adds support for mainboard iBASE:MB899
based on Kontron 986LCD-M
changed superIO chip to w83627ehg, dropping MIDI
dropped second superIO at 4e
changed superIO-addr from 2e to 4e
adjusted irq_tables.c and devicetree.cb
dropped setup of 3xGBit-Ethernet
adjusted IRQ-map (using values from mainboard/intel/d945gclf)
disabled parts about HD-audio (missing on that board)
Signed-off-by: Bernhard M. Wiedemann <corebootbmw@lsmod.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibase/mb899/acpi/thermal.asl')
-rw-r--r-- | src/mainboard/ibase/mb899/acpi/thermal.asl | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/src/mainboard/ibase/mb899/acpi/thermal.asl b/src/mainboard/ibase/mb899/acpi/thermal.asl new file mode 100644 index 0000000000..d1774d4756 --- /dev/null +++ b/src/mainboard/ibase/mb899/acpi/thermal.asl @@ -0,0 +1,94 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +// Thermal Zone + +Scope (\_TZ) +{ + ThermalZone (THRM) + { + + // FIXME these could/should be read from the + // GNVS area, so they can be controlled by + // coreboot + Name(TC1V, 0x04) + Name(TC2V, 0x03) + Name(TSPV, 0x64) + + // At which temperature should the OS start + // active cooling? + Method (_AC0, 0, Serialized) + { + Return (0xf5c) // Value for Rocky + } + + // Method (_AC1, 0, Serialized) + // { + // Return (0xf5c) + // } + + // Critical shutdown temperature + Method (_CRT, 0, Serialized) + { + Return (Add (0x0aac, 0x50)) // FIXME + } + + // CPU throttling start temperature + Method (_PSV, 0, Serialized) + { + Return (0xaaf) // FIXME + } + + // Get DTS Temperature + Method (_TMP, 0, Serialized) + { + Return (0xaac) // FIXME + } + + // Processors used for active cooling + Method (_PSL, 0, Serialized) + { + If (MPEN) { + Return (Package() {\_PR.CPU1, \_PR.CPU2}) + } + Return (Package() {\_PR.CPU1}) + } + + // TC1 value for passive cooling + Method (_TC1, 0, Serialized) + { + Return (TC1V) + } + + // TC2 value for passive cooling + Method (_TC2, 0, Serialized) + { + Return (TC2V) + } + + // Sampling period for passive cooling + Method (_TSP, 0, Serialized) + { + Return (TSPV) + } + + + } +} + |