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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-03-19 16:44:46 -0500
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-03-21 08:06:44 +0100
commit91e9f676b779f3fc85efd0a5cac01a17cc66e01f (patch)
treeef860cd3c7b106821f7805b49c61877259e49320 /src/mainboard/hp
parenta2a4bcf1a56f7d3041bf5dfff65ac9030ef1e3a0 (diff)
mainboards/amd/fam10: Add romstage timestamps
Example output: 1:start of rom stage 542 2:before ram initialization 193,989 (193,447) 3:after ram initialization 3,319,114 (3,125,124) 4:end of romstage 3,320,004 (889) Change-Id: Idcde7dc4c7a1d6c3118c82b67e8c2fcd4a07553b Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/8776 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 4aefcd22fc..bf054d512a 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -37,6 +37,7 @@
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include <console/console.h>
+#include <timestamp.h>
#include <cpu/amd/model_10xxx_rev.h>
#include "southbridge/broadcom/bcm5785/early_smbus.c"
#include <northbridge/amd/amdfam10/raminit.h>
@@ -96,6 +97,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 bsp_apicid = 0, val;
msr_t msr;
+ timestamp_init(timestamp_get());
+ timestamp_add_now(TS_START_ROMSTAGE);
+
if (!cpu_init_detectedx && boot_cpu()) {
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
@@ -202,13 +206,18 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* all ap stopped? */
// init_timer(); // Need to use TMICT to synchronize FID/VID
+ timestamp_add_now(TS_BEFORE_INITRAM);
printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
+ timestamp_add_now(TS_AFTER_INITRAM);
+
cbmem_initialize_empty();
post_code(0x41);
bcm5785_early_setup();
+ timestamp_add_now(TS_END_ROMSTAGE);
+
post_cache_as_ram();
}